ATREPM=0, PBUSY=0, ACLRM=0, SQCLR=0, SQMON=0, PID=00, INBUFM=0, BSTS=0, SQSET=0
Pipe 5 Control Register
| PID | Response PID 0 (00): NAK response 1 (01): BUF response (depending on the buffer state) 2 (10): STALL response 3 (11): STALL response |
| Reserved | These bits are read as 000. The write value should be 000. |
| PBUSY | Pipe Busy 0 (0): The relevant pipe is not used for the transaction. 1 (1): The relevant pipe is used for the transaction. |
| SQMON | Sequence Toggle Bit Confirmation 0 (0): DATA0 1 (1): DATA1 |
| SQSET | Sequence Toggle Bit Set 0 (0): Write disabled 1 (1): Specifies DATA1. |
| SQCLR | Sequence Toggle Bit Clear 0 (0): Write disabled 1 (1): Specifies DATA0. |
| ACLRM | Auto Buffer Clear Mode 0 (0): Disabled 1 (1): Enabled (all buffers are initialized) |
| ATREPM | Auto Response Mode 0 (0): Auto response is disabled. 1 (1): Auto response is enabled. |
| Reserved | These bits are read as 000. The write value should be 000. |
| INBUFM | Transmit Buffer Monitor 0 (0): No data to be transmitted is in the FIFO buffer 1 (1): Data to be transmitted is in the FIFO buffer |
| BSTS | Buffer Status 0 (0): Buffer access by the CPU is disabled. 1 (1): Buffer access by the CPU is enabled. |